feat: initial

asm-arm.8

@@ -0,0 +1,47 @@
+.de IN
+.TP
+.BR \fB\\$1\fR ", " \\$2
+..
+.TH asm-arm 7 2025-10-22 "AGJ Manpages v1.0.0" "Miscellaneous Information Manual"
+
+.SH NAME
+asm-arm \- Lookup of 32bit ARM assembly instructions
+
+.SH INTRODUCTION
+The arm CPU architecture is split up into multiple levels. \fIARMv6-M\fR only exists in \fICortex-M0/M0+\fR skews, where
+\fIARMv7-M\fR exists in \fICortex-M3/4/7\fR skews.
+
+.SH REGISTERS
+
+.TS
+tab(;);
+lC lC lC.
+\fIr0-r10\fR;=; General Purpose registers.
+r11 (fp);=; Frame Pointer.
+r12 ;=; Intra Procedural Call.
+r13 (sp) ;=; Stack Pointer.
+r14 (lr) ;=; Link Register.
+r15 (pc) ;=; Program Counter.
+CSPR ;=; Current Program State.
+.TE
+
+.SH CSPR
+Consists of multiple flags.
+
+.\" TODO: Write these
+
+.SH CORTEX-M0/M0+ INSTRUCTION SET
+
+.IN ADD
+
+.SH AUTHOR
+Asger Gitz\-Johansen <asger.gitz@hotmail.com>.
+
+.SH COPYRIGHT
+            Copyright (C) 2025  Asger Gitz-Johansen
+
+This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version.
+
+This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along with this program.  If not, see <https://www.gnu.org/licenses/>.